Low-power, parallel photonic interconnections for Multi-Chip Module applications [electronic resource].
- Washington, D.C. : United States. Dept. of Energy, 1994. and Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy.
- Physical Description:
- 7 pages : digital, PDF file
- Additional Creators:
- Sandia National Laboratories, United States. Department of Energy, and United States. Department of Energy. Office of Scientific and Technical Information
- Restrictions on Access:
- Free-to-read Unrestricted online access
- New applications of photonic interconnects will involve the insertion of parallel-channel links into Multi-Chip Modules (MCMs). Such applications will drive photonic link components into more compact forms that consume far less power than traditional telecommunication data links. MCM-based applications will also require simplified drive circuitry, lower cost, and higher reliability than has been demonstrated currently in photonic and optoelectronic technologies. The work described is a parallel link array, designed for vertical (Z-Axis) interconnection of the layers in a MCM-based signal processor stack, operating at a data rate of 100 Mb/s. This interconnect is based upon high-efficiency VCSELs, HBT photoreceivers, integrated micro-optics, and MCM-compatible packaging techniques.
- Published through SciTech Connect., 12/31/1994., "sand--94-2878c", " conf-9505121--1", "DE95008518", 45. electronic components and technology conference, Las Vegas, NV (United States), 22-26 May 1995., and Carson, R.F.; Lear, K.L.; Lovejoy, M.L.
- Funding Information:
View MARC record | catkey: 14108733