Performance measurements of hybrid PIN diode arrays [electronic resource].
- Washington, D.C : United States. Dept. of Energy. Office of Energy Research, 1990.
Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy.
- Physical Description:
- Pages: (3 pages) : digital, PDF file
- Additional Creators:
- Stanford Linear Accelerator Center, United States. Department of Energy. Office of Energy Research, and United States. Department of Energy. Office of Scientific and Technical Information
- Restrictions on Access:
- Free-to-read Unrestricted online access
- We report the successful development of hybrid PIN diode arrays and a series of room-temperature measurements in a high-energy pion beam at FNAL. A PMOS VLSI 256 × 256 readout array having 30 μm square pixels was indium-bump bonded to a mating PIN diode detector array. Preliminary measurements on the resulting hybrid show excellent signal-to-noise at room temperature. 3 refs., 5 figs.
- Report Numbers:
- E 1.99:slac-pub-5357
E 1.99: conf-9010212--21
- Other Subject(s):
- Published through SciTech Connect.
Symposium on detector research and development for the Superconducting Super Collider, Fort Worth, TX (USA), 15-18 Oct 1990.
Shapiro, S.L.; Collins, T.; Arens, J.F.; Skubic, P.; Wilburn, C.D.; Kramer, G.; Worley, S.; Jernigan, J.G. . Space Sciences Lab.
- Funding Information:
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