Analyzing the trade-off between multiple memory controllers and memory channels on multi-core processor performance [electronic resource].

Published: Washington, D.C. : United States. Dept. of Energy, 2010.
Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy.
Additional Creators: Los Alamos National Laboratory, United States. Department of Energy, and United States. Department of Energy. Office of Scientific and Technical Information

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Summary

Increasing the core-count on current and future processors is posing critical challenges to the memory subsystem to efficiently handle concurrent memory requests. The current trend to cope with this challenge is to increase the number of memory channels available to the processor's memory controller. In this paper we investigate the effectiveness of this approach on the performance of parallel scientific applications. Specifically, we explore the trade-off between employing multiple memory channels per memory controller and the use of multiple memory controllers. Experiments conducted on two current state-of-the-art multicore processors, a 6-core AMD Istanbul and a 4-core Intel Nehalem-EP, for a wide range of production applications shows that there is a diminishing return when increasing the number of memory channels per memory controller. In addition, we show that this performance degradation can be efficiently addressed by increasing the ratio of memory controllers to channels while keeping the number of memory channels constant. Significant performance improvements can be achieved in this scheme, up to 28%, in the case of using two memory controllers with each with one channel compared with one controller with two memory channels.

Report Numbers

E 1.99:la-ur-10-00045
E 1.99: la-ur-10-45
la-ur-10-45
la-ur-10-00045

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Note

Published through SciTech Connect.
01/01/2010.
"la-ur-10-00045"
" la-ur-10-45"
Workshop on Large-Scale Parallel Processing ; April 19, 2010 ; Atlanta, GA.
Sancho Pitarch, Jose Carlos; Lang, Mike; Kerbyson, Darren.

Funding Information

AC52-06NA25396

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