International Linear Collider Accelerator Physics R&D [electronic resource].
- Published
- Washington, D.C. : United States. Dept. of Energy. Office of Science, 2008.
Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy. - Physical Description
- 472KB : digital, PDF file
- Additional Creators
- University of Illinois at Urbana-Champaign, United States. Department of Energy. Office of Science, and United States. Department of Energy. Office of Scientific and Technical Information
Access Online
- Restrictions on Access
- Free-to-read Unrestricted online access
- Summary
- ILC work at Illinois has concentrated primarily on technical issues relating to the design of the accelerator. Because many of the problems to be resolved require a working knowledge of classical mechanics and electrodynamics, most of our research projects lend themselves well to the participation of undergraduate research assistants. The undergraduates in the group are scientists, not technicians, and find solutions to problems that, for example, have stumped PhD-level staff elsewhere. The ILC Reference Design Report calls for 6.7 km circumference damping rings (which prepare the beams for focusing) using “conventional” stripline kickers driven by fast HV pulsers. Our primary goal was to determine the suitability of the 16 MeV electron beam in the AØ region at Fermilab for precision kicker studies.We found that the low beam energy and lack of redundancy in the beam position monitor system complicated the analysis of our data. In spite of these issues we concluded that the precision we could obtain was adequate to measure the performance and stability of a production module of an ILC kicker, namely 0.5%. We concluded that the kicker was stable to an accuracy of ~2.0% and that we could measure this precision to an accuracy of ~0.5%. As a result, a low energy beam like that at AØ could be used as a rapid-turnaround facility for testing ILC production kicker modules. The ILC timing precision for arrival of bunches at the collision point is required to be 0.1 picosecond or better. We studied the bunch-to-bunch timing accuracy of a “phase detector” installed in AØ in order to determine its suitability as an ILC bunch timing device. A phase detector is an RF structure excited by the passage of a bunch. Its signal is fed through a 1240 MHz high-Q resonant circuit and then down-mixed with the AØ 1300 MHz accelerator RF. We used a kind of autocorrelation technique to compare the phase detector signal with a reference signal obtained from the phase detector’s response to an event at the beginning of the run. We determined that the device installed in our beam, which was instrumented with an 8-bit 500 MHz ADC, could measure the beam timing to an accuracy of 0.4 picoseconds. Simulations of the device showed that an increase in ADC clock rate to 2 GHz would improve measurement precision by the required factor of four. As a result, we felt that a device of this sort, assuming matters concerning dynamic range and long-term stability can be addressed successfully, would work at the ILC. Cost effective operation of the ILC will demand highly reliable, fault tolerant and adaptive solutions for both hardware and software. The large numbers of subsystems and large multipliers associated with the modules in those subsystems will cause even a strong level of unit reliability to become an unacceptable level of system availability. An evaluation effort is underway to evaluate standards associated with high availability, and to guide ILC development with standard practices and well-supported commercial solutions. One area of evaluation involves the Advanced Telecom Computing Architecture (ATCA) hardware and software. We worked with an ATCA crate, processor monitors, and a small amount of ATCA circuit boards in order to develop a backplane “spy” board that would let us watch the ATCA backplane communications and pursue development of an inexpensive processor monitor that could be used as a physics-driven component of the crate-level controls system. We made good progress, and felt that we had determined a productive direction to extend this work. We felt that we had learned enough to begin designing a workable processor monitor chip if there were to be sufficient interest in ATCA shown by the ILC community. Fault recognition is a challenging issue in the crafting a high reliability controls system. With tens of thousands of independent processors running hundreds of thousands of critical processes, how can the system identify that a problem has aris...
- Report Numbers
- E 1.99:doe/fg/41281-1
doe/fg/41281-1 - Subject(s)
- Other Subject(s)
- Note
- Published through SciTech Connect.
09/03/2008.
"doe/fg/41281-1"
Michael J. Haney; Michael Davidsaver; George D. Gollin; Michael Kasten; Jason Chang; Perry Chodash; Will Dluger; Alex Lang; Yehan Liu. - Type of Report and Period Covered Note
- Final; 09/01/2003 - 08/31/2007
- Funding Information
- FG02-03ER41281
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