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Strategies for concurrent processing of complex algorithms in data driven architectures

Author
Stoughton, John W.
Published
Oct 1, 1990.
Physical Description
1 electronic document
Additional Creators
Mielke, Roland R. and Som, Sukhamoy
Online Version

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Unclassified, Unlimited, Publicly available.
Free-to-read Unrestricted online access
Summary
Performance modeling and performance enhancement for periodic execution of large-grain, decision-free algorithms in data flow architectures are discussed. Applications include real-time implementation of control and signal processing algorithms where performance is required to be highly predictable. The mapping of algorithms onto the specified class of data flow architectures is realized by a marked graph model called algorithm to architecture mapping model (ATAMM). Performance measures and bounds are established. Algorithm transformation techniques are identified for performance enhancement and reduction of resource (computing element) requirements. A systematic design procedure is described for generating operating conditions for predictable performance both with and without resource constraints. An ATAMM simulator is used to test and validate the performance prediction by the design procedure. Experiments on a three resource testbed provide verification of the ATAMM model and the design procedure.
Other Subject(s)
Collection
NASA Technical Reports Server (NTRS) Collection.
Note
Document ID: 19910011082.
Accession ID: 91N20395.
NASA-CR-187450.
NAS 1.26:187450.
Terms of Use and Reproduction
No Copyright.
View MARC record | catkey: 15681976