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Logic synthesis and verification algorithms / by Gary D. Hachtel, Fabio Somenzi
Author:
Hachtel, Gary D.
Published:
Boston : Kluwer Academic Publishers, [1996]
Copyright Date:
©1996
Physical Description:
xxxi, 564 pages : illustrations ; 26 cm
Additional Creators:
Somenzi, Fabio
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Subject(s):
Integrated circuits
—
Very large scale integration
—
Design
—
Data processing
Logic design
—
Data processing
Integrated circuits
—
Verification
Computer-aided design
ISBN:
0792397460 (acid-free paper)
Bibliography Note:
Includes bibliographical references (pages 537-553) and index.
View MARC record
| catkey: 1710825