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Design technology co-optimization in the era of sub-resolution IC scaling / Lars Liebmann, Kaushik Vaidyanathan, and Lawrence Pileggi

Author
Liebmann, Lars W.
Published
Bellingham, Washington : SPIE, [2015]
Physical Description
1 online resource (160 pages).
Additional Creators
Vaidyanathan, Kaushik, Pileggi, Lawrence, 1962-, and Society of Photo-Optical Instrumentation Engineers
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Restrictions on Access
Restricted to subscribers or individual electronic text purchasers.
Contents
1. The escalating design complexity of sub-resolution scaling -- 2. Multiple exposure patterning enhanced digital logic design -- 3. Design for manufacturability -- 4. Design technology co-optimization (DTCO) -- references.
Summary
Tackle the challenges facing the most advanced technology nodes in the microelectronics industry with the help of design technology co-optimization (DTCO). This mediation process aims to ensure competitive technology architecture definition while avoiding schedule or yield risks caused by unrealistically aggressive process assumptions. Find the answers in this Tutorial Text, which reviews the fundamental design objectives as well as the resulting topological constraints of a standard cell logic design flow; cell design, placement, and routing are examined against the backdrop of ever-increasing design constraints in advanced technology nodes.
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Genre(s)
ISBN
9781628416695 electronic
9781628419054 alk. paper
Note
"SPIE Digital Library."--Website.
Bibliography Note
Includes bibliographical references and index.
Other Forms
Also available in print version.
Technical Details
Mode of access: World Wide Web.
System requirements: Adobe Acrobat Reader.
View MARC record | catkey: 21833152