Method and apparatus for in-system redundant array repair on integrated circuits [electronic resource].
- Washington, D.C. : United States. Dept. of Energy, 2008. and Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy
- Additional Creators:
- Lawrence Berkeley National Laboratory, United States. Department of Energy, and United States. Department of Energy. Office of Scientific and Technical Information
- Restrictions on Access:
- Free-to-read Unrestricted online access
- Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.
- Published through SciTech Connect., 07/29/2008., "7,405,990", "US patent application 11/872,085", and Bright, Arthur A. (Croton-on-Hudson, NY); Crumley, Paul G. (Yorktown Heights, NY); Dombrowa, Marc B. (Bronx, NY); Douskey, Steven M. (Rochester, MN); Haring, Rudolf A. (Cortlandt Manor, NY); Oakland, Steven F. (Colchester, VT); Ouellette, Michael R. (Westford, VT); Strissel, Scott A. (Byron, MN).
- Funding Information:
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