Actions for A hybrid framework for design and analysis of fault-tolerant architectures for nanoscale molecular crossbar memories [electronic resource].
A hybrid framework for design and analysis of fault-tolerant architectures for nanoscale molecular crossbar memories [electronic resource].
- Published
- Washington, D.C. : United States. Dept. of Energy, 2005.
Oak Ridge, Tenn. : Distributed by the Office of Scientific and Technical Information, U.S. Dept. of Energy - Physical Description
- 7 unnumbered pages : digital, PDF file
- Additional Creators
- Los Alamos National Laboratory, United States. Department of Energy, and United States. Department of Energy. Office of Scientific and Technical Information
Access Online
- Restrictions on Access
- Free-to-read Unrestricted online access
- Summary
- It is anticipated that self assembled ultra-dense nanomemories will be more susceptible to manufacturing defects and transient faults than conventional CMOS-based memories, thus the need exists for fault-tolerant memory architectures. The development of such architectures will require intense analysis in terms of achievable performance measures - power dissipation, area, delay and reliability. In this paper, we propose and develop a hybrid automation framework, called HMAN, that aids the design and analysis of fault-tolerant architectures for nanomemories. Our framework can analyze memory architectures at two different levels of the design abstraction, namely the system and circuit levels. To the best of our knowledge, this is the first such attempt at analyzing memory systems at different levels of abstraction and then correlating the different performance measures to provide the system designers guidelines for designing a robust nanomemory. We also illustrate the application of our framework to self-assembled crossbar architectures by analyzing a hierarchical fault-tolerant crossbar-based memory architecture that we have developed, and comparing this with existing crossbar architectures.
- Report Numbers
- E 1.99:la-ur-05-7196
la-ur-05-7196 - Subject(s)
- Note
- Published through SciTech Connect.
01/01/2005.
"la-ur-05-7196"
DESIGN AUTOMATION AND TEST IN EUROPE CONFERENCE, March 2006, MUNICH.
Graham, P. S. (Paul S.); Gokhale, M. (Maya); Bhaduri, D. (Debayan); Shukla, S. K. (Sandeep K.); Coker, D. (Deji); Taylor, V. (Valerie).
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